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类型外文翻译-VHDL语言介绍.doc

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    外文 翻译 VHDL 语言 介绍
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    1、英文原文原文出处:DOUGLASLP.VHDL:programming by exampleMNew York:McGrawHill Professional2002FOREWORDVHDL has been at the heart of electronic design productivity since initial ratification by the IEEE in 1987. For almost 15 years the electronic design automation industry has expanded the use of VHDL from init

    2、ial concept of design documentation, to design implementation and func tional verification. It can be said that VHDL fueled modern synthesis technology and enabled the development of ASIC semiconductor compa nies. This book has served as the authoritative source of practical information on the use o

    3、f VHDL for users of the language around the world.The use of VHDL has evolved and its importance increased as semi conductor devices dimensions have shrunk. Not more than 10 years ago it was common to mix designs described with schematics and VHDL. But as design complexity grew, the industry abandon

    4、ed schematics in favor of the hardware description language only. The successive revisions of this book have always kept pace with the industrys evolving use of VHDL.The fact that VHDL is adaptable is a tribute to its architecture. The industry has seen the use of VHDLs package structure to allow de

    5、sign ers, electronic design automation companies and the semiconductor indus try to experiment with new language concepts to ensure good design tool and data interoperability. When the associated data types found in the IEEE 1164 standard were ratified, it meant that design data interoper ability wa

    6、s possible.All of this was facilitated by industry backing in a consortium of systems, electronic design automation and semiconductor companies now known as Accellera.And when the ASIC industry needed a standard way to convey gate-level design data and timing information in VHDL, one of Accelleras p

    7、rogenitors (VHDL International) sponsored the IEEE VHDL team to build a companion standard. The IEEE 1076.4 VITAL (VHDL Initiative Towards ASIC Libraries) was created and ratified as offers designers a single language flow from concept to gate-level signoff.In the late 90s, the Verilog HDL and VHDL

    8、industry standards teams collaborated on the use of a common timing data such as IEEE 1497 SDF, set register transfer level (RTL) standards and more to improve design methodologies and the external connections provided to the hardware description languages.But from the beginning, the leadership of t

    9、he VHDL community has assured open and internationally accredited standards for the electronic design engineering community. The legacy of this teams work continues to benefit the design community today as the benchmark by which one measures openness.The design community continues to see benefits as

    10、 the electronic design automation community continues to find new algorithms to work from VHDL design descriptions and related standards to again push designer productivity.And, as a new generation of designers of programmable logic devices move to the use of hardware description languages as the ba

    11、sis of their design methodology, there will be substantial growth in the number of VHDL users.This new generation of electronic designers, along with the current designers of complex systems and ASICs, will find this book invaluable . Updated with current ue of the standard, all will benefit from th

    12、e years of use that have made the VHDL language the underpinning of successful electronic design.Introduction to VHDLThe VHSIC Hardware Description Language is an industry standard language used to describe hardware from the abstract to the concrete level. VHDL resulted from work done in the 70s and

    13、 early 80s by the U.S. Department of Defense. Its roots are in the ADA language, as will be seen by the overall structure of VHDL as well as other VHDL statements.VHDL usage has risen rapidly since its inception and is used by literally tens of thousands of engineers around the globe to create sophi

    14、sticated electronic products. This chapter will start the process of easing the reader into the complexities of VHDL. VHDL is a powerful language with numerous language constructs that are capable of describing very complex behavior. Learning all the features of VHDL is not a simple task. Complex fe

    15、atures will be introduced in a simple form and then more complex usage will be described.In 1986, VHDL was proposed as an IEEE standard. It went through a number of revisions and changes until it was adopted as the IEEE 1076 standard in December 1987. The IEEE 1076-1987 standard VHDL is the VHDL use

    16、d in this book.(Appendix D contains a brief description of VHDL 1076-1993.) All the examples have been described in IEEE 1076 VHDL, and compiled and simulated with the VHDL simulation environment from Model Technology Inc. VHDL TermsBefore we go any further, lets define some of the terms that we use throughout the book. These are the basic VHDL building blocks that are used in almost every description, along with some terms that are rede

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